Strategic Company Highlights:
| (i) | Successfully closed the Vega Links acquisition, transforming Palomino into a comprehensive AI interconnect company and expanding the Company’s estimated addressable market by approximately 10x to greater than $60 billion; | |
| (ii) | Appointed Karthik Gopalakrishnan as Chief Technology Officer (CTO) and Rajesh Radhamohan as Chief Product Officer (CPO) to lead the Company’s AI interconnect chipset strategy and product roadmap; AND | |
| (iii) | Added d-Matrix Founder & CTO, Sudeep Bhoja, and veteran Silicon Valley semiconductor executive and entrepreneur, Dr. Gopal Raghavan, to Palomino’s Strategic Advisory Board, strengthening the Company’s technical and strategic leadership. | |
GOLETA, Calif., Aug. 03, 2026 (GLOBE NEWSWIRE) — Palomino Laboratories, Inc. (OTCQB: PALX) (‘Palomino’ or the ‘Company’), an artificial intelligence (AI) interconnect technology company, today announced the successful closing of its previously announced acquisition of Vega Links Inc., creating a next-generation AI interconnect company to address the rapidly expanding AI infrastructure market. The transaction was completed on schedule following the execution of definitive agreements and satisfaction of all closing conditions.
Vega Links Inc. was founded to pioneer advanced AI systems architecture and interconnect technologies for next-generation AI infrastructure, bringing deep expertise in high-speed AI and memory connectivity. The completed acquisition accelerates Palomino’s strategy to become a leading AI interconnect technology company, combining Palomino’s gallium nitride (GaN) MicroLED technologies with Vega Links’ silicon design, systems architecture, and product engineering strengths.
Executive Leadership and Strategic Advisory Board Actions
Effective upon closing, Karthik Gopalakrishnan has been appointed Palomino’s Chief Technology Officer (CTO) and Rajesh Radhamohan has been appointed Palomino’s Chief Product Officer (CPO).
The Company also announced the appointments of Sudeep Bhoja and Gopal Raghavan to Palomino’s Strategic Advisory Board.
Sudeep Bhoja is the Co-founder and Chief Technology Officer of d-Matrix, an AI computing company building next-generation inference accelerators for generative AI. He brings more than 25 years of experience in semiconductor architecture, high-speed interconnects, and AI computing. Previously, he was Chief Technology Officer of the Datacenter Business Unit at Inphi Corporation (acquired by Marvell Technology), where he led the development of PAM4 DSP interconnect and silicon photonics technologies. Prior to Inphi, he was Technical Director in Broadcom’s Infrastructure and Networking Group, with earlier roles at Lucent Technologies and Texas Instruments.
Dr. Gopal Raghavan is a veteran Silicon Valley semiconductor executive, entrepreneur, and technology strategist with more than four decades of leadership spanning semiconductor architecture, embedded AI, and high-performance computing. Throughout his career, he has held executive leadership and technical roles at Microsoft, Renesas Electronics, Cadence Design Systems, Intel, Hughes Electronics, and Conexant, and served as Co-Founder and Chief Technology Officer of Inphi Corporation (Acquired by Marvell Technology), a pioneer in high-speed semiconductor interconnect technologies. He also served as CEO and Co-Founder of Eta Compute, an edge AI semiconductor company, and continues to advise emerging technology companies on strategy and commercialization. Dr. Raghavan’s experience building innovative semiconductor businesses, leading engineering organizations, and commercializing advanced technologies will provide valuable strategic guidance as Palomino expands its AI interconnect platform.
Executive Commentary
Jeffrey B. Shealy, Co-Founder and CEO of Palomino Laboratories Inc., commented: “The successful closing of the Vega Links acquisition marks the beginning of an exciting new chapter for Palomino. We are building a world-class leadership team and Strategic Advisory Board with deep expertise across AI infrastructure, semiconductor architecture, networking, and product innovation.” Mr. Shealy continued, “We are thrilled to welcome Karthik and Rajesh to our executive leadership team, along with Sudeep and Gopal to our Strategic Advisory Board. Together, this exceptional team significantly strengthens our ability to execute our vision of becoming a premier AI interconnect company delivering differentiated semiconductor technologies that enable the next generation of AI infrastructure.”
Karthik Gopalakrishnan, Co-founder and CTO of Palomino Laboratories Inc., added: “The future of AI infrastructure will require innovation across system architecture, silicon, networking, and advanced interconnect technologies. Bringing together the complementary capabilities of Palomino and Vega Links creates an outstanding opportunity to develop next-generation AI interconnect solutions.” Mr. Gopalakrishnan concluded, “Our objective is to develop highly differentiated AI interconnect chipsets that improve bandwidth, latency, power efficiency, and scalability while enabling customers to build larger and more efficient AI computing clusters.”
Industry Opportunity
The Company believes future AI clusters will rely on heterogeneous interconnect technologies rather than a single approach. Copper is expected to remain important for very short-reach applications, while optical technologies, including MicroVCSEL and MicroLED based solutions, are expected to play an increasingly important role as AI clusters continue to scale. Management believes this broader technology portfolio positions the Company to pursue opportunities across multiple segments of the rapidly expanding AI networking market. The Company intends to leverage the combined engineering organization to accelerate customer engagements, expand strategic partnerships, and advance commercialization of its AI interconnect chipset roadmap.
About Palomino Laboratories
Palomino Laboratories is an artificial intelligence (AI) interconnect technology company headquartered in Goleta, California, developing next-generation connectivity solutions for the rapidly evolving AI infrastructure market. The Company’s product focus addresses AI interconnect solutions in the 0-to-50 meters range and includes: (i) silicon chipsets enhancing the speed of copper, (ii) silicon optical integrated circuits (IC’s) optimizing the performance of MicroVCSEL interconnects, and (iii) silicon and gallium nitride IC’s for MicroLED interconnects. The Company’s chipsets are designed to enable high-bandwidth, low-latency, and energy-efficient data movement across AI systems. Palomino’s solutions are designed to support the growing performance demands of AI, high-performance computing (HPC), enterprise networking, hyperscale data centers and advanced robotics as increasingly intelligent systems require faster, more efficient, and more reliable data connectivity.
For more information, please visit www.palominolabs.ai.
Forward-Looking Statements
This release contains “forward-looking statements” within the meaning of the Private Securities Litigation Reform Act of 1995 and other statements that are predictive in nature, that depend upon or refer to future events or conditions. All statements other than statements of historical fact are statements that could be forward-looking statements. Forward-looking statements include words such as “expects,” “anticipates,” “intends,” “plans,” “could,” “believes,” “estimates” and similar expressions. These statements involve known and unknown risks, uncertainties and other factors which may cause actual results to be materially different from any future results expressed or implied by the forward-looking statements Forward-looking statements are subject to a number of risks and uncertainties, including, but not limited to, the factors listed under “Risk Factors” in the Company’s filings with the SEC, including Forms 10-K, 10-Q and 8-K. Investors are cautioned not to place undue reliance on such forward-looking statements, which speak only as of the date of this release. Except as may be required by law, the Company does not undertake any obligation to release publicly any revisions to such forward-looking statements to reflect events or circumstances after the date hereof or to reflect the occurrence of unanticipated events.
For further information
Palomino Laboratories Inc.
Jeffrey B. Shealy, CEO
Email: IR@palominolabs.ai
A photo accompanying this announcement is available at https://www.globenewswire.com/NewsRoom/AttachmentNg/6ee51370-91ae-4dd5-939d-936e886c2a63
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